Jordonezcerezo-tfg

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Project Card[edit]

Name : Visual control of a robot with open FPGA

Student : Juan Ordoñez Cerezo (University of Granada).

Teachers/Directors : Jose María Cañas Plaza (University Rey Juan Carlos of Madrid), María Encarnación Castillo Morales (University of Granada), Diego Pedro Morales Santos (University of Granada).

GitHub repository : https://github.com/RoboticsURJC-students/2017-tfg-juan-ordonez


Robot Visual control with open FPGA[edit]

In this page it will find a project directed by the University of Granada and the University Rey Juan Carlos (Madrid). In this project, a robot will be controlled with vision control. The robot will be able to recognize a specific image in real time. For this reason, a free FPGA called Alhambra has been chosen (Made in Spain).

It uses the free tool IceStudio, which allows to make digital circuits easily and it can be downloaded on the Alhambra board for real implementation.

Would it be possible for children and non-electronic people to design digital circuits?

With IceStudio is possible.

(3)Preparing of environment (I2C Module )[edit]

In order to make sure wheter the robot is secure for a real environment, the most dangerous modules should be tested.

The steps will be:

1)A VGA module is built to see the expected results like a first aproximation.

2)A IMU is used like a input. It will obtain the angle of the IMU. This angle will change in relation to the position. In this step, the next behaviour will be achieved :

3) A PWM Module is built in order to move a brushless motor (PWM Module).

4) This is the moment to configure PID control (PID Module).

Now, each step separately will be explained.

1. I2C Module

First of all, the knowledge of I2C protocol is necessary. To do this, all parts of i2c will be explained.

Now, a little summary about a complete i2c operation:

The transaction on the bus is started throught a START condition. A “start_condition” is executed when a transaction is initiated. SDA changes to LOW while SCL remains HIGH. A representation of this state is represented in the following image:


After this has been transmitted by the master, the bus is considered busy. The next byte of data transmitted after the start condition contains the address of the slave in the first 7 bits and the eighth bit tells whether the master is receiving data from the slave or transmitting data to the slave. At this time is important to know what is the “change” state. A “change_condition” occurs when SDA can change its state while SCL remains LOW. In a transfer with i2c, this is the only time when the emmitter system can put each character in the SDA line. A representation of this state is represented below:



When an address is sent, each device in the system compares the first seven bits after a start condition with its address.

Only when SCL has a HIGH value, the emitter or receiver system can catch the value of the SDA line. For this reason is important to respect the “change_condition”.If they match the device considers itself addressed by the master.

Each slave in the system has a different direction to be captured. For example, the slave address asociated to the L3GD20H is 110101xb. Data transfer with acknowledge is mandatory. The transmitter must release the SDA line during the acknowledge pulse. The acknowlegde pulse is the ninth pulse. In any case, SDA and SCL line have to be connected to a pull-up resistence. In order to release the SDA line, SDA must have a high impedance value. The receiver must then pull the data line LOW so that it remains low during the HIGH period of the acknowledge pulse. A receiver wich has been addressed is obliged to generate an acknowledge after each byte of data received. A example of ACK is represented below:


After the start condition a slave address is sent, once a slave ackknowledge has been returned, a 8-bit sub-address will be transmitted: the 7 LSb represent the actual registrer address. The slave address is completed with a Read/Write bit. If the bit is ‘0’ (Write), the next byte represents the registrer that will be written. In another case, if the bit is ‘1’ (Read), the next byte represents the registrer that will be read.

The I2C embedded inside the Pololu IMU behaves like a slave device and the following protocol must be adhered to. After the start condition a slave address is sent, once a slave acknowledge has been returned, a 8 bit sub address will be transmitted: the 7 LSb represent the actual register address while the MSB enables address auto increment. With the MSB to 1, in the next transaction, the registrer address will be automatically incremented to allow multiple data read/write.

The slave address is completed with Read/Write bit. If the bit was ‘1’ (Read), a repeated start condition will have to be issued after the two sub-address bytes. If the bit is ‘0’ (Write) the master will transmit to the slave with direction unchanged.

The following tables show a set of possible transaction. In order to reach an specific goal one of them has to be configured.

Data are transmitted in byte format (DATA). Each data transfer contains 8 bits. The number of bytes transferred per transfer is unlimited. Data is transferred with the most Significant bit first. If a receiver can not receive another complete byte of data until it has performed some other function, it can hold the clock line, SCL low to force the transmitter into a wait state. Data transfer only continues when the receiver is ready for another byte and releases the data line. If a slave receiver doesn’t acknowledge the slave address (i.e. it is not able to receive because it is performing some real time function) the data line must be left HIGH by the slave. The Master can then abort the transfer. A LOW to HIGH transition on the SDA line while the SCL line is HIGH is defined as a STOP condition. A example of stop condition is represented below:

In order to achieve this behaviour in a FPGA, it is necessary to define a state-machine.

Before to explain the state machine, it is very important to know some things:

-Note that SDA line has to be a in/out port but in the IceZum Alhambra these type of ports are not available. In order to obtain something like this, a tri-state can be used. In IceStudio, an example of a project with a tri-state could be the following:

When oe == 1, PIN_IN_OUT will be “out” and in another case, when oe==0, “dout”=”in”=PIN_IN_OUT. That way can be achieved a in/out port. In the case of a I2C operation, PIN_IN_OUT will be the SDA line.

A possible state machine could be the following. All the most important states will be explained.

For more details, the document can be downloaded in the following link:

I2C_Write.pdf

(2)Preparing of environment (VGA Module)[edit]

In order to make sure wheter the robot is secure for a real environment, the most dangerous modules should be tested.

The steps will be:

1)A VGA module is built to see the expected results like a first aproximation. (VGA Module) In this step, the following behaviors will be achieved:

2)Two potentiometer are used like an input. It will obtain the product of its values and will show it on the screen (Using for that the above module). In this step, I2C and 8-bit multiplier will be tested. (I2C and Multiplier Module).

3) A PWM Module is built in order to move a brushless motor (PWM Module).

4) This is the moment to configure PID control (PID Module).

Now, each step separately will be explained:

1. VGA Module

The following web pages has been visited in order to build this module:

https://github.com/Obijuan/MonsterLED/wiki

https://olimex.wordpress.com/2016/07/19/fpga-tutorial-vga-video-generation-with-fpga-and-verilog-add-video-memory-to-the-project-and-object-animation/

http://www2.elo.utfsm.cl/~lsb/elo211/labs/2006/elo212-lab08-0106.pdf

https://electr0nicablog.wordpress.com/2016/09/01/controladorvga/

http://martin.hinner.info/vga/timing.html

https://learn.digilentinc.com/Documents/269

http://www.epanorama.net/faq/vga2rgb/calc.html

The following link can be visited to get a first basic module. This module shows an unique color on the screen but a representation of a number wants to be achieved:

[ObiJuan/MonsterLEDWiki[1]]

In addiction, it is necessary to build the circuit to excute this module. The steps of the previous link can be followed using the next wiring diagram:


Our real circuit look like this:

And connected to FPGA:


In order to move forward it is necessary to know how it works a VGA controller.

It exists three signals, red, green and blue wich send information to a VGA monitor. The totality of the colors can be obtains with a lineal comination of them.

A pixel do not has a lot of information to make an image, a horizontal line has a little more and with a matrix of pixels it can begin building an image. A VGA matrix has 480 rows with a total of 640 columns (pixels). So as to set an image in the screen it is required two synchronization signals, one for each axis.

It will be build three independents module. A summary can be:

-HSYNC_GENERATOR: This module generates two synchronization signals for the vertical and horizontal axis. Also, this module is connected to FPGA inputs in order to send the values to GP0 GP2 GP1 GP3 GP5 like it can see in the next image (Pins). With an input, the color for actual pixel is decided.

-VGA: This module is in charge to evaluate and calculate the color for the actual pixel and sends it to HSYNC_GENERATOR.

-FONTS: This module contains the ranges of pixels for each number. If the position for actual pixel is within the defined área for a specific number, we send a ‘flag’ with a true value to VGA module for deciding wheter the pixel has to be drawn or not and for deciding the color for this pixel.

HVSYNC_GENERATOR MODULE

Two counters are needed, a counter (horizontal counter) to count pixels in each line and another counter (vertical counter) to count lines in a frame. The horizontal counter needs to reset itself when it reaches the end of the line (799 in this case). Similarly, vertical counter needs to reset itself when it reaches the end of the frame. The following image shows the HS and VS generation based on the counter values.

To obtain synchronism between horizontal pixels and vertical pixels, two signals have to be generated like the next diagram:


It is important to notice that the numbers of pixel or lines will change depending on the resolution we want to achieve.


Input: clock and reset.

Output: H_sync, V_sync, CounterX and CounterY

Behaviour: 1) Declarations are made. 2)A different clock is needed, in order to do so, a Lattice Core can be used. 3)The ranges have to be defined to generate the horizontal and vertical counters (HSync and VSync). 4)With a module always@(posedge px_clock) the horizontal and vertical counters are generated. 5)The activearea has to be defined, a schema is represented in the next picture:

6)Finally, if actual pixel is in the active área, the pixel is drawn on the screen. The color of the pixel is given by 'color_px' input.


The module in IceStudio is represented below:


ACTUAL_PIXEL MODULE

This module is able to solve the color for actual pixel. If the actual pixel is in any area of a number (specified in the next module) , the color will be different to white. That is to say, this module only serves to see if the actual pixel is or not in a "number area". This "number areas" will be defined in the next module, like a "database of numbers". This database can be included in this module.


Input: px_clk, hc, vc,x_px, y_px, flag

Output: color_px

Behaviour: 1) Declarations are made. 2)A logo is drawn on the bottom, so the pixels have to be saved in memmory3)In this module, x_px and y_px are the position for actual pixel again. When the actual pixel changes, it has to be revised in order to know if it is in a region number, in logo area or in another part of the screen. In each case, a different color is assigned to color_px. For this purpose it is neccesary to define any color. 4) The next module is in charge to evaluate if the actual pixel is in a region number. A flag with true or false value is delivered by the next module. If the value is true, the actual pixel has to be drawn. In short, this module draws the actual pixel with a color different to black if flag is true for actual pixel or actual pixel is in logo area.


DB_NUMBER MODULE

In this last module, the área of each number is defined. The numbers will have the next aspect:

As it can see in the picture, if each segment is defined by separate, all numbers can be represented. Only it is neccesary to activate the segments depending on the number. For example, if number 1 has to be represented, only it is neccesary to activate two segments, a and b in this case. One DB_number module is used to represent a number, if more than one number have to be represented, more tan one DB_number module will be used.


Input: number, x_px, y_px, pc_clk

Output:flag

Parameter: Offset

Behaviour: 1) Declarations are made 2) Area of segments have to be defined. In order to so, x_px and y_px mark the position for actual pixel. A signal will be 1 if the actual pixel is in the región área or 0 if the actual pixel is in another part of the screen. 3) Now, continuing with the example, in order to draw the number 1: if actual pixel is in área “a” or área “b” flag will be true. In another case, flag will be false. For all the numbers their respective areas are defined. With offset, the position of the number on the screen is fixed. For example if 123 number has to be represented: 1) Three modules FONT are connected 2) The ofsset will be, 0, 106 and 212 respectively.


An example of three DB_number connected is represented below:

(1)IceZum Alhambra[edit]

IceZum Alhambra is a FPGA that implements IceStudio. As can be seen in its webpage, Icestudio is a graphic IDE for open FPGAs. It is built on top of the Icestorm project. This IDE is available for GNU/Linux, Windows and Mac OS X.

Supported boards:

-IceZUM Alhambra -Kéfir I iCE40-HX4K -Nandland Go board -iCE40-HX8K Breakout Board -iCEstick Evaluation Kit -icoBOARD 1.0 -Source code: https://github.com/FPGAwars/icestudio


Installation

In order to install IceStudio in Windows it can be followed the detailed steps in http://icestudio.readthedocs.io/en/latest/source/installation.html#windows

Do not forget to install ToolChain¡¡



Hello World

To get in touch with IceStudio, it is started with a LED.

Sum 1 bit and Switch

In this case, when a switch is pushed, the final count will be increased. Also, the outputs will be represented in the leds.